It is actually interesting because the FPU and SDMA share the same physical clock trace on the Falcon motherboard. Generally when you mess with the SDMA clock end, you inherently change the FPU clock behaviour as well. Though I think the FPU clock end never gets the attention like the SDMA end of the signal does. Unfortunately when you terminate the SDMA clock, you also effect the clock signal on the FPU which can be suffering in logic high voltage switch can lead to FPU issues.
First let's take a look at what the actual problem is to start with.
The problems start because of a weak clock drive from the combel and how the clocks are distributed across the board.
- falcon_clock.PNG (40.33 KiB) Viewed 2599 times
The left side (CPUCLK) comes from the output of the Combel (normally via a resistor as well) which drives the 3 main clocks via 3x 33R resistors. It is basically standard practice to have the series resistance to help stop oscillations / ringing etc. Generally this is a good thing. Problem is, when you drive clocks from the same source they actually interfere with each other because of varying reflections from each other's traces. If one track has a lot of noise, it will backfeed the other clock lines as they are all wired together via the 33R resistors. It can even generate harmonics which further compound the issue. The problem is also compounded by Atari's very bad routing of the entire motherboard which has many "no no unnecessary right angle tracks", which increase the impedances of the tracks and make ringing even worse.
The analogy is, if you poured a bucket of water into a long guttering channel which is closed at the both ends for example. The flow of water will travel from the source (bucket) to the opposite end. When it does , the water will bounce back (reflect) from the opposite end and cause a ripple to flow back towards the source.
As I do not have a stock Falcon anymore without the clock patch. I had to do a simulation of the 3 clock signals and what one would basically look like under such a condition.
- chaoswave.PNG (19.58 KiB) Viewed 2598 times
The waveform should ideally look like a square wave and not the disaster as illustrated above. If the Falcon were a real bird, we would probably just shoot it and put it out of its misery
Now enters the "classic" clock patch which the majority of clock patches are based upon. The original clock patch was to just simply fit a 74F04 inverter which can provide a good output to drive the clocks Individually. Aside from the combined clock of the FPU & SDMA that is.
It's worth noting that the Phantom clock patch uses a separate wire for the SDMA clock and is driven via slow gates on a separate IC. The SDMA should get a better clock being on its own separate wire. It is still a long distance away which is still going to cause some with ringing, though maybe not as much as with the original track. The FPU clock will still suffer from the long traces, but again, likely not as much, as the SDMA clock is decoupled from the track.
- classic.jpg (219.28 KiB) Viewed 2598 times
This separates the clocks and buffers them individually with a higher current driving signal. It does, however, have the side effect of increasing the ringing problems on the clock lines due to higher output current.
Take the analysis of such a clock patch on the FPU clock.
- fpu.png (52.32 KiB) Viewed 2598 times
What we see here is a overshoot of over 8 volts (should be 5volts) and a undershoot of almost 3Volts. This can indeed be extremely damaging to connected chips.
Similarly on the SDMA end of the trace we have a even bigger problem.
- sdma.png (53.37 KiB) Viewed 2598 times
Generally this ringing & over/undershoot, which I'll just call "noise" from here on out, is clamped by adding a small value capacitor around 100pF value or clamping it with a low value resistor. But it generally does not fully solve the problems and can result in a lower voltage clock signal. This can indeed greatly help the the SDMA clock end of the trace, but the FPU end will likely end up at a much lower voltage and can even cause FPU malfunctions.
Another problem which I have witnessed on some Falcons is that the logic low level on the SDMA clock is basically dependent on the undershoot of the signal rather than the signal's actual logic low level. The undershoot is generally on the order of 5-10ns and does not stay low long enough for the SDMA to register correctly a logic low level. The later revisions of the exxos V2 clock patch solve this problem by re-biasing the voltage levels so that the undershoot is actually undershoot from 0 volts, as it is supposed to be. The logic low level is thus corrected.
You can actually end up with something like 2v DC offset between the clock source and destination. So if the "logic low" is 2v, you're not at a logic low at all. So when it's crowbarred with a very low resistors such as 47R, it's literally forcing the DC offset down to more like 1V and "mostly" the voltage swing is high enough to still push a logic high over 2v. Basically it's sacrificing logic high voltage for more logic low voltage, while limiting the clock's peak to peak voltage. Not good basically!
However, on my two Falcons, 47R clamps the clock down to more like 0.5v (logic high!) and that's not enough by far, hence then my Falcon won't boot as its SDMA clock is basically low all the time.
So while low values such as 47R are classified as a termination resistor, which is true, it is actually crowbarring the DC offset of the clock line back down towards "normal" logic levels. It also concerns me that 47R by itself could draw up to 100mA! I seriously doubt the Combel could push that current by itself or various buffer/inverter ICs. Hence why I have been recommending for years that such a low value is simply not used.
So the natural progression of the clock patch is to add a small series resistance of generally around 33R, to the clock lines to eliminate the noise and basically cleanup the clock signals.
For example a value of 22R limits the noise as illustrated below.
FPU clock via 22R.
- fpures.png (49.65 KiB) Viewed 2597 times
SDMA clock via 22R.
- sdmares.png (49.11 KiB) Viewed 2597 times
The exxos V2 patch has suitable resistors so the noise is reduced to levels as illustrated below on the SDMA clock.
- f2.png (124.05 KiB) Viewed 2597 times
