If anyone wants a project..

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exxos
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Re: If anyone wants a project..

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terriblefire wrote: Fri Apr 10, 2020 11:50 am Just a quick question though... why perfectly 68k? cant we extend 1cm in one direction and have IDE?
There isn't much room around the 68K sockets on the H4 especially as some other boards are already overhanging the 68K sockets as it is. But likely IDE will be integrated on the next motherboard design along with some other features anyway. They may fit on original STFM machines, but then that would get onto doing 2 different boards.. I'm not really looking towards original machines anymore, to much trouble.

EDIT:
I guess if you did a IDE version, I could always rip out the IDE stuff for the H4 anyway. Though if people wanted more cool stuff, they should probably just build a full TF536 anyway.
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Re: If anyone wants a project..

Post by terriblefire »

exxos wrote: Fri Apr 10, 2020 12:01 pm EDIT:
I guess if you did a IDE version, I could always rip out the IDE stuff for the H4 anyway. Though if people wanted more cool stuff, they should probably just build a full TF536 anyway.
Fair enough. I was thinking also of things like the CDTV/A1000 etc too. Make it somewhat reusable.
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Re: If anyone wants a project..

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terriblefire wrote: Fri Apr 10, 2020 12:29 pm Fair enough. I was thinking also of things like the CDTV/A1000 etc too. Make it somewhat reusable.
Makes sense.
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Re: If anyone wants a project..

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These Xilinx chips need a clock buffer to clean up the clock... But i'm thinking a 2x or 4x fixed clock multiplier might be useful to run the SDRAM a faster rate.
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Re: If anyone wants a project..

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terriblefire wrote: Fri Apr 10, 2020 2:29 pm These Xilinx chips need a clock buffer to clean up the clock... But i'm thinking a 2x or 4x fixed clock multiplier might be useful to run the SDRAM a faster rate.
A buffer is a good idea. Likely the CPU CLK will be 8MHz or 50MHz etc though. Not sure what clocks SDRAM needs.
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Re: If anyone wants a project..

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exxos wrote: Fri Apr 10, 2020 3:16 pm
terriblefire wrote: Fri Apr 10, 2020 2:29 pm These Xilinx chips need a clock buffer to clean up the clock... But i'm thinking a 2x or 4x fixed clock multiplier might be useful to run the SDRAM a faster rate.
A buffer is a good idea. Likely the CPU CLK will be 8MHz or 50MHz etc though. Not sure what clocks SDRAM needs.
RAM can go up to 133Mhz. But it need 3-4 clocks min to get anything out of it. I'm wondering if doubling the clock would mean we could make that 2 clocks.
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Re: If anyone wants a project..

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terriblefire wrote: Fri Apr 10, 2020 3:21 pm RAM can go up to 133Mhz. But it need 3-4 clocks min to get anything out of it. I'm wondering if doubling the clock would mean we could make that 2 clocks.
I guess it may need its own clock ? Important thing is it doesn't issue dtack until data is ready. As the CPU running at 60mhz would pickup dtack pretty fast over 8mhz CPU.
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Re: If anyone wants a project..

Post by terriblefire »

exxos wrote: Fri Apr 10, 2020 3:56 pm
terriblefire wrote: Fri Apr 10, 2020 3:21 pm RAM can go up to 133Mhz. But it need 3-4 clocks min to get anything out of it. I'm wondering if doubling the clock would mean we could make that 2 clocks.
I guess it may need its own clock ? Important thing is it doesn't issue dtack until data is ready. As the CPU running at 60mhz would pickup dtack pretty fast over 8mhz CPU.
what do we think is the max upper limit on the CPU speed. I can do some trickery back from that point.
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Re: If anyone wants a project..

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terriblefire wrote: Fri Apr 10, 2020 4:12 pm what do we think is the max upper limit on the CPU speed. I can do some trickery back from that point.
The CPU max about 64mhz but likely be 50mhz for normal usage. Anything above 50MHz is down to "overclocking" and I doubt people will get much past 64MHz there.

Edit.
https://www.exxosforum.co.uk/forum/viewt ... 510#p32482. Couldn't get past 75mhz, needed freezer spray at that point :lol:
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Re: If anyone wants a project..

Post by PhilC »

Yep, 64 with a heat sink would run Frontier demo all day for me.
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