DFB1r5 Design Review Thread

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Badwolf
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Joined: Tue Nov 19, 2019 12:09 pm

Re: DFB1r5 Design Review Thread

Post by Badwolf »

There seems to have been some confusion about the purpose of the FPU on this board, let me just clear this up:

I've added the FPU to DFB1 as 1) there was just enough room; 2) I had some FPUs and 3) the most commonly used compiler for Mintlib programs requires an FPU for 020-060 optimised code, even if it never uses it.

To that end, the FPU is there to allow software to run. I intended to run the FPU at half CPU speed, and that's the default. However there is ample option to tweak this with a second oscillator slot and easily accessible top-side inline termination resistors on the clock lines.

Robert (@12-MHz) has done some investigation and found possible signal integrity issues with the FPU control lines. That's quite feasible, this is a 'nice to have' feature designed to allow more software run. It's not optimised at all.

It's entirely possible that some FPUs that work at X MHz in a TT will only work at Y MHz in DFB1 where Y < X. Half the data and one quarter of the address lines aren't isolated from the motherboard and there is no optimisation on layout for a high speed interconnect.

Please do experiment. The firmware and the design files are all open source and (like I say) the clock lines are easily accessed, but if you're not doing it for academic endeavour, I'll ask you one question: can you really notice the difference between a 25MHz and 40MHz FPU?

Cheers,

BW
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