Atari STe 1040 trashing UltraSatan SD card

[zChris]

This is the resistor i got https://www.ebay.com/itm/313651559646

And yeah it's oriented correctly I have done a continuity test on the above side. Do i need to do it under aswell ?

[exxos]

This is the resistor i got https://www.ebay.com/itm/313651559646

And yeah it's oriented correctly I have done a continuity test on the above side. Do i need to do it under aswell ?

Looks correct. You need to look at the schematic as well as test all traces to it. As it was working before, you must have a damaged via or track around it somewhere.

[zChris]

I have done continuity tests on the legs and so far havent found any breaks.
Here are the connections i have probed. Two connections i didnt find on the schematics was XHALT and XBGACK.

1 -> VCC OK
2 -> Leg 4 on U210 (7405) OK
2 -> HALT on 68000 OK
2 -> XHALT didnt find this on the schematics
3 -> BERR on 68000 OK
3 -> XBERR on GSTMCU OK
3 -> BERR on STB (Blitter) OK
4 -> BGACK on 68000 OK
4 -> XBGACK on didnt find this on the schematics
4 -> BGACK on STB (Blitter) OK
5 -> BA on 68000 OK
5 -> XBA on GSTMCU OK
5 -> BA on STB (Blitter) OK
6 -> RW on 68000 OK
6 -> RXW on GSTMCU OK
6 -> RW on STB (Blitter) OK
6 -> RW on GSTSFTA OK
7 -> LDS on 68000 OK
7 -> XLDS on GSTMCU OK
7 -> LDS on STB (Blitter) OK
8 -> UDS on 68000 OK
8 -> XUDS on GSTMCU OK
8 -> UDS on STB (Blitter) OK
9 -> AS on 68000 OK
9 -> XAS on GSTMCU OK
9 -> AS on STB (Blitter) OK

[sporniket]

Two connections i didnt find on the schematics was XHALT and XBGACK.

I suppose that you are using the scanned schematics.

I did a conversion into Kicad (shameless self promotion : viewtopic.php?f=31&t=4584 ) that would help you locate XBGACK going from the blitter to the CPU and R112 (R112 is not installed when there is an external blitter)

Then you have XBGK going from the MCU into the Blitter and R112.

XHALT comes from U210 (a 74xx06) pin 4, as well XRESET (from pin 2)

Hope this helps.

[rubber_jonnie]

This is the resistor i got https://www.ebay.com/itm/313651559646

And yeah it's oriented correctly I have done a continuity test on the above side. Do i need to do it under aswell ?

IIRC you won't boot without the DMA.

Regarding continuity testing, yes you do need to test both sides, otherwise you may still have a missing connection.

At this stage I wouldn't replace the 1.2K unless you absolutely must to avoid damage.

Looking back at some of your pics, there doesn't seem to be much solder round the top of the SIL legs. If you have a broken via, this might be a reason for failure.

What solder are you suing BTW? I only ever use lead based solder as lead free can have undesirable results and sometimes needs more heat.

I'd recommend the schematics that @sporniket made, they helped me a lot with Brett's STE.

[zChris]

Thats great @sporniket ill take a look into it.

@rubber_jonnie : This particular P100 doesnt seem to have connection running to it on the back. I have added solder more ontop though.
Im using leadfree and have the heat set to maybe 330 - 340C degrees. Its a pita to work with though, but i guess on the flipside its not as unhealthy to inhale the smoke.

[rubber_jonnie]

@rubber_jonnie : This particular P100 doesnt seem to have connection running to it on the back. I have added solder more ontop though.

Not sure what you mean by that. What I mean is that the via the pins sit in need to be full of solder from top to bottom, even if you don't have a connection both sides.

Im using leadfree and have the heat set to maybe 330 - 340C degrees. Its a pita to work with though, but i guess on the flipside its not as unhealthy to inhale the smoke.

Honestly, I don't do anything on STs with lead free solder, or any of the other retro machines I work on TBH. I find it a PITA to work with and it doesn't always play nice if there is any leaded solder present. It's caused me more trouble than good.

I find it much more prone to forming cold joints, something you really don't want. It may be part of the problems your facing. Of course this is just my experience, your mileage may vary.

[zChris]

If anyone uses Logic 2 software (for saleae probes) they can take a look at how the signals i've recorded look like. The last session is just me recording HALT and pressing the reset button.

In order to record it i did place the probes where they should be and then cold booted the atari. Then it records i think it was 5 seconds after the first trigger on the signal. For the adress-busses the trigger was AS..

The signals recorded are AS, RESET. HALT, CLOCK, these signals are recorded from a working STe named "GOOD STE". Then i also recorded AS+Adress-buss up to 23 on the BAD STe.

Since i cant upload it on the forum here is a download link: https://www.dropbox.com/s/dr5msu1gtw6gd ... s.sal?dl=0

/zChris

[Badwolf]

but i guess on the flipside its not as unhealthy to inhale the smoke.

That’s not lead in the smoke: that’s the flux and it’s orders of magnitude worse for you. You’d have to be sucking on the solder to get much lead into you.

The lead free stuff only really comes into its own when the equipment gets junked.

Good luck,

BW

[Badwolf]

If anyone uses Logic 2 software (for saleae probes) they can take a look at how the signals i've recorded look like.
...
The signals recorded are AS, RESET. HALT, CLOCK, these signals are recorded from a working STe named "GOOD STE". Then i also recorded AS+Adress-buss up to 23 on the BAD STe.

The file linked there is a single session and looks like this to me:-

Screenshot 2022-07-14 at 19.35.09.png (60.07 KiB) Viewed 975 times

There is nothing at all good about this.

Firstly the sample rate is 1MS/s. You're dealing with an 8MHz machine. 16MS/s is the *absolute* minimum to measure the clock.

Second, if your above lines are accurate, RESET, HALT and CLK are all low. Clock should always be oscillating. Whilst it'll look odd at a 1/8th sampling rate, you should see some ups and downs.

AS is mostly low, going high on a few occasions. Both the low and high durations are *far* too long for bus cycles.

My suspicion is you've uploaded the wrong file.

BW