- The LaST Upgrade -


Last updated November 7, 2016


I have been asked a few times about issues regarding the MEGA ST. First issues are relating to the blitter and patch. Also why my V1 CPU booster did not work on the MEGA ST. I have spent a great deal of time in doing my own tests and here are my findings so far.

Firstly I had 4 MEGA ST's to play about with. The motherboards are shown below.

MEGA ST V2.1 C103277

MEGA ST REV 4 C100167
MEGA ST REV 5 C100167

The blitter patch is seem on top of each CPU other than the REV 4 which I removed. During my investigations I noticed the blitter patch was needed only on early MEGA ST revisions. After a some testing I found that there was some screwy timing issues with the IMP chips on those machines. In particular the 16mhz input to the IMP MMU was nowhere near in sync with the 8mhz clock output from the MMU. However the 4mhz output was in sync with the 8mhz.


On the left is a STFM MMU (CO25912-38) and on the right is a IMP MMU (C100109-001 )

With the ST MMU the clock are not far behind each other, probably less than 5ns. However on the right image, the clock are around 15ns out of sync. This might not sound much, though when you take into account a 16mhz CPU booster which has to sync to the 8mhz and 16mhz clocks. Then that delay would actually result in a clock glitch of probably around 30mhz which would cause the MEGA to crash (and not even try to boot in fact). My V1 16mhz CPU booster was tried in the IMP MEGA machine and it did not work. In the later MEGA machines, not using IMP chips, everything worked fine.

So my first thought was to simply replace the MEGA ST's IMP chips with STFM ones. However this did not work either. I later found that the MEGA ST (as shown in the first motherboard image) has 8 DRAM chips. Later MEGA's had more banks.. This was interesting. I also noticed the later MEGA's had LS244 buffers on the RAS and CAS lines, and the MEGA ST did not. So it interested me why the buffer and why the change of DRAM and brand of MMU chips etc.

I found that the IMP and STFM chips worked in the later MEGA machines. But only IMP chips worked in the early MEGA. At the time of writing I am unsure why. Though clear Atari decided to buffer some lines to solve a problem. I cannot see any real difference between IMP and STFM MMU outputs. The STFM MMU can drive a lot of DRAM so driving just 8 chips should be easy work for it. There is not much between the DRAM used on the early MEGA and the later MEGAs. The DRAM I compared was TC514256-10 and TC51100-12. At first glance I assumed 100ns was to fast and the buffering was used to speed up the MMU signals. While that could be true, I have ran the STFM MMU down to 60ns so that can't be the issue.

The only real differences between the 2 chips are as shown below.

CAS to WRITE delay time varies from 25ns to 65ns between DRAM chips. Some other figures seem a fair difference in speed also. The majority of the specs are reasonably close. At this point it is possible while the DRAM is listed as 100ns, that some other specs cause delays which are out of spec of the MMU. Atari could have buffered the MMU to speed up transition times, and also changed back to a actual faster DRAM, despite it being listed as 120ns not 100ns.

Currently, it is looking like the 100ns DRAM's are actually slower than the 120ns versions in some respects. I am told 80ns DRAM works, and the specs are of course faster than either the 100ns or 120ns DRAMs. At this point I assume the 100ns Drams are only working in some odd combinations of motherboard revision and chip manufactures.

One of the MEGA image actually has a STFM MMU in place and it does work. Though the STFM GLUE does not work in that machine. Interestingly the DRAM is different and a NEC D424256C-10. A quick look at the specs and its not much better than the TC514256, though looks marginally faster. This could be enough to allow the STFM MMU to work with those chips. Assuming a change of DRAM will allow the STFM MMU to be used. There is still the problem as to why the STFM GLUE does not work in the machine with the NEC DRAM and STFM MMU. * TO FOLLOW UP *

One other odd observation is the odd pattern I get currently with the STFM MMU in place.

In touching the 373/244 buffers the red dots change slightly and the white vertical bars change. I added some pull ups onto the chips and got almost a solid white pattern, but still did not try to boot. It would seem the buffers inputs or outputs are floating. Probably due to the MMU not even doing a single cycle. Not even /AS gets pulsed after turn on so its almost like the CPU clock is not running (but it is).

I have not mentioned the blitter patch much yet. Though it seems the blitter works fine on later MEGA machines, with the MMU buffer and not using IMP chips. I have tried a few blitter chips, even ones from STE and I do not see any problems with any blitters tested so far with or without the blitter patch. However I do suggest the patch be removed on later machines not using IMP chips as I am not a fan of delays caused by the patch. I have removed the patch on the REV4 and REV5 boards and not noticed any issues.

Removing the patch from a MEGA with IMP chips causes the corruption as shown in the image below. So its clear the patch is only needed for MEGA's using IMP chips. Also it is unfortunate that it is currently unlikely that any speed boosters can be used with MEGA's with IMP chips.

To corruption is 2 dots at the top left and right of the image. Also some random dots around "Help" menu. Plus the green background showing though the white GEMBench box.

I do not see this corruption or any blitter errors in removing the patch from later MEGA's not using IMP chips.

As a update , I tried removing the blitter patch in a MEGA4 , which uses IMP chips and it seems to work fine. I tried 2 blitters, marked"ST" and one taken from a STE. Both work fine without the patch. This is indeed strange. Though still throws up more questions around the MEGA1.


I did a little testing on the MEGA4 buffers to see if there was any difference between that and the MEGA1 which does not have buffers.

Currently I have been unable to find any significant difference between MMU & DRAM, on either the -38 MMU or the IMP MMU. So next in line was the buffers.

The left image shows the rise and fall of a MEGA1 without the buffers. On the right is the MEGA4 with the buffers. In this case a 74F244.

While the images were not the same voltage-div setting, I can say the output of the 74F244's was actually 4volts. So that was a surprise. Also a surprise that the rise and fall have a glitch around 2 volts. Normally such glitch is seen with CMOS devices called "millier capacitance". Though was strange to see this on logic buffers. It is possible driving all the banks of DRAM added a bit more load on the buffers than they could cope with.

So what would happen in the MEGA4 with the buffers removed I thought ?

On the left the -38 STFM MMU. On the right the IMP MMU.

I jumper linked over U59. This removed the buffer from all the RAS & CAS lines and 2 address lines.

We can clearly see how the voltage has jumped up to 5V (from 4V with the 74F244 buffers) and the rise and fall transitions look perfect now. Also note the IMP waveform on the HI part is a lot worse than the -38 STFM MMU.

So going by these current tests, The MMU buffers actually seem to make matters worse. So as they are not there in the MEGA1. I would assume Atari left them out on that machine as they were not needed, and if anything, made matters worse.

So currently, there is no real difference between the MEGA4 and the MEGA1 other than the DRAM types installed (and the buffers). I have been looking around and found a set of MITSUMI DRAM which I will try in the MEGA1 when they arrive.

More things tested.... All tests are done with blitter, without patch unless otherwise stated.

So currently.

MEGA1 (REV 2.1) Only works with IMP chips at 8mhz with blitter patch. Without patch causes corruption on VDI tests in GB4. TC514256P-10 DRAM

MEGA1 (REV 2.1) Works with IMP & STFM chips at 8mhz with blitter patch. Without patch causes corruption on VDI tests in GB4. TC514256P-10 DRAM

MEGA1 (REV 2.1) will not work with IMP chips at 16mhz (with blitter or without blitter, no patch - give 2 bombs on power up) TC514256P-10 DRAM

MEGA1 (REV 2.1) Will work with IMP or STFM chips at 8mhz. M5M44256BP-7 DRAM.

MEGA1 (REV 2.1) Will work with only with STFM chips at16mhz. M5M44256BP-7 DRAM.

MEGA4 (REV B) Only works with IMP chips at 16mhz . TC511000AP-10 DRAM

MEGA4 (REV B) will work at 8mhz with either brand of chips . TC511000AP-10 DRAM

MEGA4 (REV B) will work at 8/16mhz with either brand of chips . TC511000AP-10 DRAM

MEGA4 (REV 4.0) Will work with STFM chips or IMP chips at 16mhz (Needs 100R on 16mhz line) . TC511000P-12 DRAM.

MEGA (REV5.0) Works with either brand of chips at 16mhz (Needs 100R on 16mhz line) . TC511000AP-10 DRAM - ( IMP Shifter diode removed=crashed)


I had a thought to try the IMP chips in a working STFM. I used IMP GLUE & MMU and the blitter was a "ST" brand. This setup was tried in 8mhz and 16mhz modes and worked perfectly. So the plot thickens as to what is causing the problems on the MEGA's.


I spent some time looking into the MEGA REV5 board as it almost works with IMP chips. I confirmed that with IMP MMU it crashed with lots of bombs during RAM test in GB4. Luckily the 74LS244 / 74LS373 buffers were in sockets. So I swapped the 244's out with a 74ABT244 and it seems to have solved the crashing problem on the MEGA REV5. I tried the IMP MMU at 16mhz and it gave a lot of corruption. It worked fine with the STFM MMU. So something still not right with the IMP MMU somewhere.

Also something odd as the 5V supply to the shifter went though a diode on that board. Voltage were 4.88V to 4.58V. I tried linking over the diode, and to my surprise it crashed a lot, sometimes showing the odd vertical line pattern as shows previously. As the was a decoupling cap on that pin due to the diode, I put one in, and the crashing came back. This was with a IMP shifter. Strangely the diode was not there on the REV4 board.

I then found some 74F373 buffers and the REV5 board started working again. I bridged over the diode on the shifter and at power up it just went to desktop without any icons pretty much straight away. After several more tests it crashed on VDI graphics tests. So something still not stable somewhere. Though the big clue seems to be the IMP 5V diode.

I checked the 16mhz line and the voltage was pretty low (around 2V) as I had it running though a 100R resistor. Sometimes the 100R resistor is needed as the 16mhz signal is pretty bad. Though in linking over the resistor, the MEGA did not boot. In fact I was back to the yellow and white vertical bars again. This seemed to mirror the MEGA1 problems.

I changed the 100R to 33R, voltage a fraction better, but still crashed on VDI test. Removing the resistor went back to the vertical bars again. So it would seem there is a buffering issue on the 16mhz line, which I have seen on the STFM as well in fact.

I tried feeding the 16mhz output of the shifter though the 74F buffer on the booster board first, then feeding it back to the motherboard, but that did not work either. I suspect the diode in dropping the 5V to the shifter seems to solve whatever problem is there, it also drops the 16mhz a little to much and causes the V1 booster not to function correctly.

I replaced the MEGA1 buffers with 74F373 and 74ABT244 and it did not change anything either. There seems to be voltage issues on some 16mhz lines across boards which could be a source of one problem. Though on one board as the voltage is being dropped to the shifter with a diode, in order to fix some other problem, its creating another problem.


The diode on the 5V line of the shifter was tried on a few other boards, and just resulted in the display going very dim.

On the MEGA1 there is a 100R resistor on the 16mhz line (R150). I added in a extra 1K and it started working with the IMP shifter. I swapped back to the STFM MMU and still not working there. So while there is some strange things going on. The shifter does not seem to directly cause the STFM MMU to not work.

I think the problems of the clocks looking out of sync are actually a red herring. Adding a 1K variable pot on the 16mhz line caused the waveforms to drift in and out of sync rather a lot. I think it is just how the scope is latching onto the signals. As the signals are so bad and noisy, I think the scope just locks onto them incorrectly and the clock syncs are not what they appear to be.

I noticed I was using TOS102 on the MEGA1. So I swapped it out for TOS104 and during boot it bombed out and then loaded gembench then locked up. That was strange as TOS version should not effect how the machine actually operates, not to that extent anyway. I later found placing a 1K pull up resistor on ROM CE to 5V line solved the TOS104 problem.


The REV4 board had 200ns ROMs 6 chips. I changed them for 120ns ROM 6chip and the MEGA still functioned correctly with faster ROMs. It also by default had STFM chips. I tried a IMP GLUE and still worked correctly.

Currently the speed of ROMs from 100ns to 200ns did not change any results on a MEGA1 and the MEGA4 REV4 board.

A small test showed the delay between 8mhz input to IMP GLUE and 4mhz output 24ns delay. The STFM was 16ns delay. It does suggests the IMP chips are slower. So they could be just slow enough to work. Idea then that using slower ROMs and slowing down the RAM lines may help. Though it seems not.

I upped the values on all RAS, CAS, WE, DATA lines. They are 33R on the board and I added in a extra 68R for 101R per line. No change with IMP or STFM GLUE.


I have 2 MEGA1 board, both identical.. Only one board would only work with IMP MMU.. Refused to work with STFM MMU..

Well this has gotta be the oddest problem in the history of problems... Believe it or not, address strobe wasn't connected from the CPU to the MMU! Though how the hell could it even work with IMP chips like that ?! No fucking idea...

I lose the PCB track under the white silk screen print, there must be a break somewhere under it. The pad is soldered onto CPU, but its not connected to the track about 1 inch away! It must be a manufacturing defect on the board.

I was scoping the MMU pins trying to see what signals changed when pressing reset, and I just notice AS was always LO. I checked on CPU, it was always HI...

Also, I have now found the MEGA1 does NOT need the blitter patch to work correctly.

I think I officially have the keys to the gates of crazy town now! and everyone is welcome :)

So next problems are why IMP chips only work in some MEGA4 boards..

I also tested between using BG and BGACK as there seems to be some odd issues relating to which signal is used. Currently the MEGA1 only works with BG used. It crashes randomly with BGACK used.


After about 2 weeks of debugging I can finally say whats what with these machines.

MEGA1: The only time I needed the blitter patch was when one of the MEGA1's had /AS missing from the MMU. That machine only worked with IMP chips. When I hard wired a line from the MMU to the CPU it worked perfectly without the blitter patch and also worked with either STFM or IMP chips.

The MEGA1 will not work with IMP chips at 16mhz. I suspect as those chips are slower and twice as noisy as the STFM chips, that they do not work in the MEGA1 as Atari missed off the extra 2 DRAM buffers on the RAS/CAS/D0-7 lines. I suspect IMP chips work in the MEGA4 due to those buffers acting as a "noise filter".

MEGA4: All these machines seem to have a resistor missing off the 16mhz line (typically 33R) which is actually present on the MEGA1. In order for the 16mhz booster to work, a 100R resistor is needed from the shifter 16mhz line (pin 39) to the booster board. None of those machines needed the blitter patch regardless of chips used.

OTHER FINDS: I have seen some diodes on the power pins to the DMA and shifter. I do not have enough boards to look into that fully. Though I suspect on some revisions of the MEGA4 boards, Atari had serious noise issues on the shifter, in particular the 16mhz line (as they missed the resistor off!) and so they added a diode on the shifter 5V line to drop the voltage which apparently "cured" the crashing problems. I suspect the diode on the shifter was more probably there on IMP shifters. I have not found any reason to add a diode onto the IMP DMA. Though adding diodes on a otherwise working machine (with either IMP or -38 DMA) did not result in any changes. I would assume the diode was there on IMP chips on some revisions to fix some fault. I don't have enough boards to look into that any further. Though the DMA diode probably isn't needed.

While IMP chips do generally work. I really do not like them. The noise and ringing on the signals double when using IMP chips. When that noise is on the master 16mhz clock line, it causes no end of problems. Even more so when there is no resistor on the 16mhz line.

I have also noticed that some boards have video interference on the green desktop background. In part I have found noise on the 16mhz line generally causes "moving" distortions. While changing TOS ROMs seems to be another cause of noise. 6 chip set seems to be the worse. Though I have 2 2chips TOS ROM's here, and one set causes noise, the other does not. The noise can be seen in my GEM image a few pages above though not very clear image of it. Really it is like vertical patterns of noise down the screen.

So the round up overall ? Atari have really bad noise issues which is no great surprise. On some boards they added resistors, some they didn't. Some boards they bodged in other ways. IMP chips pretty much are the worse chips to have. I recommend anyone wanting to fit CPU boosters, and have IMP brand chips, to swap them out for STFM ones and try the machine as a stock machine to see if it works. If it does not, then your board could may well have a defect like mine did. If your board works with STFM chips, then it should work with CPU boosters. Though also, There seems to be no reason to have the blitter patch in any machine. I have tried various brands of blitter and they all function perfectly well on my MEGA's and on my test STFM machine (Which has blitter).

It may also seem the IMP shifter might have a higher output on the 16mhz line than the STFM one. I need to do some checking into that more at some point. Though I have always thought and known the 16mhz output was a bit weak on the STFM shifters. Weak outputs on the 16mhz line can cause problems with 16mhz boosters. While adding a 33-100R resistor in series with the line is often needed, it also reduces the the voltage somewhat. So on some machines finding the "sweet spot" may be needed. I am working on a buffer for the clocks, though that's another project for another time :)

So there you have it. The final conclusions of many long hours of hair pulling :)



If you open a recent Atari ST notice that on 68000 CPU is mounted a small PCB. Here is a modification whose goal is to filter the "Overshoot" of BGACK line.
Blitters Some are so sensitive to "overshoot" they causing "Reset" useless. This phenomenon arises, among others, when the printed SLM804 ~ through ScreenDump devil and programs. The following list blitters that require or not require modification


Vendor Date of production needed Modification
SGS before 8823 yes
SGS after 8822 no
National before 8908* yes
National after 8907 no
GE / RCA any date yes
IMP any date no

* I had a email from Juliusz saying a 8830 blitter also works ok without the patch. So could be possible Atari made a small mistake on data codes of "problem" blitters.

If you want to make yourself the change you must proceed as follows

1. Take a 74LS74 and cut the legs and 6,8,9,10,11,12,13
2. Fold up the legs 1,2,3,4 and 5
3. Présoudez all tabs of 74LS74
4. Positionez exactly the lugs 7 and 14 of the 74LS74 on the V78 position (74LS32} and solder the
5. Make the connection between the legs 1 and 2 of 74LS74
6. Connect the leg 1-2 the 74LS74 line BGACK
7. Connect pin 3 of the 74LS74 to pin 15 of CPU68000
8. Connect the leg 4 of the 74LS74 to pin 18 of CPU68000
9. Connect the leg 5 of the 74LS74 to pin 12 of CPU68000
10. Using a sharp knife cut the BGACK way, the closest to the 68000 CPU.
Your change is made!

Diagram HERE

EXXOS NOTE: So again noise on the bus is to blame for chip malfunctions. I guess a alternative method would be to just place some 100R resistors in series with lines which have "overshoot" and that would likely solve the problems without the need to "delay" the signal.

I'm assuming the 4 number code is YY/WW So 8823 becomes 1988 week 23. Going by a Blitter I have here, it is stamped 9106, so assume 1991 week 6 production and later blitter do not suffer from noise problem. So likely only early MEGA ST's off the production line need the patch.